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MIC23156 1.5a, 3mhz synchronous buck regulator with hyperlight load ? and i 2 c control for dynamic voltage scaling hyperlight load is a registered trademark of micrel, inc . mlf and micro lead frame are registered trademark s of amkor technology , inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com april 22, 2013 revision 1 .0 general description the MIC23156 is a high - efficiency 1.5a synchronous buck regulator with hyperlight load ? mode and dynamic voltage scaling control through i 2 c. hyperlight load provides very high efficiency at light loads and ultra - fast transient response. the ability to dynamically change the output voltage and maintain high output voltage accuracy make the MIC23156 perfectly suited for supp lying processor core voltages. an add itional benefit of this p roprietary architecture is very low output ripple voltage throughout the entire load range with the use of small output capacitors. fast mode p lus i 2 c provides output voltage and chip enable/d isable control from standard i 2 c bus wi th i 2 c clock rat es of 100khz, 400khz, and 1mhz. the MIC23156 is designed for use with 1h, and an o utput capacitor as small as 2.2 f that enables a total solution size, less than 1mm in height. the MIC23156 is available in both 16 - ball, 0.4mm pitch, 1.81m m x 1.71mm wafer level chip scale (wlcsp), and 17- pin 2.8mm x 2.5mm mlf ? p ackages with an operating junction temperature range of ? 40 c to +125 c. datasheets and support documentation are available on micrel?s web site at : www.micrel.com . features ? input voltage: 2.7v to 5.5v ? up to 1.5a output current ? 1mhz i 2 c - controlled adjustable output ? v out = 0.7 to 2.4v in 10mv steps ? high output voltage accuracy ( 1.5% over temperature) ? fast pin ? selectable output voltage ? programmable soft - start using external capacitor ? ultra - low quiescent current of 30 a when not switching ? thermal - shutdown and current - limit protection ? safe startup in to pre - biased output ? stable with 1 h output inductor and 2.2 f ceramic capacitor ? up to 93% peak efficiency ? ? 40 c to +125 c junction temperature range applications ? mobile handsets ? solid state drives (ssd) ? wifi/wimx/wibro modules ? portable applications typical application
micrel, inc. MIC23156 april 22, 2013 2 r evision 1.0 ordering information part number marking code default output voltage junction temperature range package vsel = low vsel = high MIC23156 - 0ycs ja 1.0v 0.8v ? 40c to +125c 16- ball 1.81mm 1.71mm wlcsp MIC23156 - 0yml jqa 17- pin 2.8mm 2.5mm mlf ( 1 ) note: 1. mlf is a green, rohs - compliant package. lead finish is nipdau. mold is halogen free. . pin configuration 1.81mm 1.71mm wlcsp (cs) adjustable output voltage ( top view) 2.8mm 2.5mm mlf (ml) adjustable output voltage (top view)
micrel, inc. MIC23156 april 22, 2013 3 r evision 1.0 pin description ball number pin number pin name pin function wlcsp mlf a1 2 scl fast - mode plus 1mhz i2c clock input pin . a2 3 sda fast - mode plus 1mhz i2c data input/output pin . a3 4 sns sense: connect to v out , close to output cap to sense v out . a4 5 ss programmable soft start: connect capacitor to agnd . b1 1 vi2c power c onnection for i 2 c bus voltage: connect this pin to the voltage domain of the i 2 c bus supply. do not leave floating. b2 11 vsel pin selectable: output voltage of either of two i 2 c voltage registers. do not leave floating. b3 7 pgood power good indicator: u se an external pull - up resistor to supply. b4 8 avin input voltage to power analog functions: connect decoupling capacitor to ground. c1, c2 16, 17 sw switch connection: internal power mosfet output switches. c3, d3 12, 13 pvin in put voltage to power switches: connect decoupling capacitor to ground. c4 9 agnd analog ground: connect to cent ral ground point where all high - current paths meet (c in , c out , and pgnd) for best operation. d1, d2 14, 15 pgnd powe r ground c onnection. d4 10 en enable: logic high enables operation of voltage regulator. logic low shuts down the device. do not leave floating. ? 6 nc no c onnect.
micrel, inc. MIC23156 april 22, 2013 4 r evision 1.0 absolute maximum ratings ( 1 ) input supply voltage (avin, pvin, vi2c) ....... ? 0.3v to +6v switch voltage (sw) ..................................... ? 0.3v to avin logic voltage (en, pgood) ......................... ? 0.3v to avin logic voltage (vsel, scl, sda) .................. ? 0.3v to vi2c analog input voltage (sns, ss) ................... ? 0.3v to avin power dissipation (t a = +70 c) ................ internally limited storage temperature (t s ) ......................... ? 65c to +150 c lead temperature (soldering, 10s) .......................... +260c esd rating ( 3) .................................................................. 2kv operating ratings ( 2 ) input supply voltage (avin, pvin, vi2c) .... +2.7v to +5.5v switch voltage (sw) .......................................... 0v to avin logic voltage (en, pgood) ............................. 0v to avin logic voltage (vsel, scl, sda) ....................... 0v to vi2c analog input voltage (sns, ss) ........................ 0v to avin junction temperature range (t j ) ....... ? 40c t j +125c thermal resistance 1.81mm 1.71mm wlcsp - 16 ( ja ) ............... 150c/w 2.8mm 2.5mm mlf - 17 ( ja ) ........................... 89c/w electrical characteristics ( 4 ) t a = 25c, avin = pvin = v en = v vi2c = 3.6v; l = 1.0 h; c out = 2.2 f, unless otherwise specified. b old values indicate ? 40c t j +12 5c, unless noted. parameter condition min. typ. max. units supply voltage range 2.7 5.5 v enable logic pin low threshold logic low 0.5 v enable logic pin high threshold logic high 1.2 v vsel logic pin low threshold logic low 0.3 vi2c v vsel logic pin high threshold logic high 0.7 vi2c v logic pin input current p ins : en and vsel 0.1 2 a underv oltage lockout threshold rising 2.45 2.55 2.65 v undervoltage lockout hysteresis falling 75 mv shutdown temperature 160 c shutdown temperature hysteresis 20 c shutdown current v en = 0v 0.1 5 a dc-to -dc c onverter output voltage a ccuracy v out = 1v , i out = 10ma ? 1.5 +1.5 % quiescent current i out = 0ma, v fb > 1.2*v out 30 50 a output voltage range 0.7 2.4 v output voltage line regulation 3.0v < v a vin < 4.5, i load = 1 0ma 0.02 %/v output voltage load regulation 20ma < i out < 1a 0.04 % notes: 1. exceeding the absolute maximum ratings may damage the device. 2. the device is not guaranteed to function outside its operating ratings. 3. devices are esd sensitive. handling precautions are recommended. human body model, 1.5k in series with 100pf. 4. specification for packaged product only.
micrel, inc. MIC23156 april 22, 2013 5 r evision 1.0 electrical characteristics ( 4 ) (continued) t a = 25c, avin = pvin = v en = v vi2c = 3.6v; l = 1.0 h; c out = 2.2 f, unless otherwise specified . b old values indicate ? 40c t j +12 5c, unless noted. parameter condition min. typ. max. units switch on - resistance i sw = +100ma, high - side switch pmos (mlf) i sw = +100ma, high - side switch pmos (wlcsp) 0.17 0.15 ? i sw = ? 100ma, low - side switch nmos (mlf) i sw = ? 100ma, low - side switch nmos (wlcsp) 0.15 0.13 current limit (dc v alue) v out = 1v 1.7 2.9 5.1 a frequency 3 mhz maximum duty cycle frequency = 3mhz 80 % dvs step size 10 mv soft - start time v out = 90%, c ss = 12 0pf 250 s i 2 c interface (assuming 550p f total bus c apacitance ) i 2 c address read (binary, hex) 101101 11, 0xb7 write (binary, hex) 10110110, 0xb6 low - level input voltage scl, sda 0.3 vi2c v high - level input voltage scl, sda 0.7 vi2c v sda pull - down r esistance open drain pull - down on sda during read back, i sda = 500 a 20 ? power good pgood output low v out < 80% v nom , i pgood = ? 500 a 100 mv pgood output leakage v out = v nom 5 a pgood threshold % of v out < v nom v out ramping up 86 96 % pgood hysteresis 5 %
micrel, inc. MIC23156 april 22, 2013 6 r evision 1.0 typical characteristics 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10000 efficiency (%) output current (ma) efficiency (v out = 2.4v) vs. output current v in = 3.6v v in = 5v v in = 4.2v c out = 2.2f l = 1h 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10000 efficiency (%) output current (ma) efficiency (v out = 1.8v) vs. output current v in = 3.6v v in = 5v v in = 2.7v v in = 4.2v c out = 2.2f l = 1h 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10000 efficiency (%) output current (ma) efficiency (v out = 1.0v) vs. output current v in = 3.6v v in = 5v v in = 2.7v c out = 2.2f l = 1h 10 100 1000 10000 100000 1000000 10000000 100 1000 10000 100000 1000000 rise time (s) c ss (pf) v out rise time vs. c ss v out = 1.0v c out = 2.2f 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 2.5 3 3.5 4 4.5 5 5.5 current limit (a) input voltage (v) current limit vs. input voltage t a = 25 c v out = 1.0v 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 -40 -20 0 20 40 60 80 100 120 current limit (a) temperature ( c) current limit vs. temperature v in = 3.6v v out = 1.0v 10 15 20 25 30 35 40 45 2.5 3.0 3.5 4.0 4.5 5.0 5.5 quiescent current (a) input voltage (v) quiescent current vs. input voltage no switching v out > v outnom * 1.2 c out = 2.2f 125 c - 40 c 25 c 0 5 10 15 20 25 30 2.5 3 3.5 4 4.5 5 5.5 shutdown current (na) input voltage (v) shutdown current vs. input voltage v out = 0v c out = 2.2f 1.7 1.725 1.75 1.775 1.8 1.825 1.85 1.875 1.9 2.5 3 3.5 4 4.5 5 5.5 output voltage (v) input voltage (v) line regulation (ccm) v outnom = 1.8v c out = 2.2f i out = 1a i out = 300ma i out = 1.5a
micrel, inc. MIC23156 april 22, 2013 7 r evision 1.0 typical characteristics (continued) 1.7 1.725 1.75 1.775 1.8 1.825 1.85 1.875 1.9 2.5 3 3.5 4 4.5 5 5.5 output voltage (v) input voltage (v) line regulation (hll) i out = 1ma v outnom = 1.8v c out = 2.2f i out = 20ma i out = 120ma 1.7 1.725 1.75 1.775 1.8 1.825 1.85 1.875 1.9 0 250 500 750 1000 1250 1500 output voltage (v) output current (ma) load regulation v in = 3.6v v outnom = 1.8v c out = 2.2f 0.980 0.985 0.990 0.995 1.000 1.005 1.010 1.015 1.020 -40 -20 0 20 40 60 80 100 120 output voltage (v) temperature ( c) output voltage vs. temperature v in = 3.6v v out = 1.0v i out = 10ma 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 2.5 3 3.5 4 4.5 5 5.5 enable threshold (v) input voltage (v) enable threshold vs. input voltage enable rising enable falling 70% 75% 80% 85% 90% 95% 100% 2.5 3 3.5 4 4.5 5 5.5 pgood threshold (%) input voltage (v) pgood threshold vs. input voltage pgood rising pgood falling 0.6 1 1.4 1.8 2.2 2.6 0 25 50 75 100 125 150 175 output voltage (v) dac voltage code output voltage vs. dac linearity i out = 250ma c out = 2.2f 9 9.5 10 10.5 11 0 25 50 75 100 125 150 175 output voltage (mv) dac voltage code output voltage vs. dac dnl i out = 250ma c out = 2.2f 0 1 2 3 4 5 -40 -20 0 20 40 60 80 100 120 switching frequency (mhz) temperature ( c) switching frequency vs. temperature v in = 3.6v v outnom = 1.0v c out = 2.2f 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 100 1000 10000 switching frequency (mhz) output current (ma) switching frequency vs. output current v out = 1.8v c out = 2.2f 2.2h 1.0h
micrel, inc. MIC23156 april 22, 2013 8 r evision 1.0 functional characteristics
micrel, inc. MIC23156 april 22, 2013 9 r evision 1.0 functional characteristics (continued)
micrel, inc. MIC23156 april 22, 2013 10 r evision 1.0 functional characteristics (continued)
micrel, inc. MIC23156 april 22, 2013 11 r evision 1.0 functional block diagram figure 1 . simplified MIC23156 functional block diagram
micrel, inc. MIC23156 april 22, 2013 12 r evision 1.0 functional description pvin the input supply (pvin) provides power to the internal mosfets for the switch mode regulator section. the p vin operating range is 2.7v to 5.5v so an input capacitor with a minimum voltage rating of 6.3 v is recommended. due to the high switching speed, a minimum 2.2f bypass capacitor placed close to pvin and the power ground (pgnd) pin is required. refer to pcb layout recommendations (mlf package) for more details. avin analog vin (avin) provides power to the internal control and analog supply circuitry. avin must be tied to pvin through a 10? rc filter. careful layout should be considered to ensure that any h igh - frequency switching noise caused by pvin is reduced before reaching avin. a 2.2f capacitor as close to avin as possible is recommended. refer to pcb layout recommendations (mlf package) for more details. en a logic high signal on the enable pin activates the output voltage of the device. a logic low signal on the enable pin deactivates the output and reduces supply current to 0.1a. do not leave t he en pin floating. MIC23156 features external soft - start circuitry via the soft start (ss) pin that reduces in - rush current and prevents the output voltage from overshooting when en is driven logic high. do not leave the en pin floating. sw the switch (sw ) connects directly to one end of the inductor and provides the current path during switching cycles. the other end of the inductor is connected to the sns pin, output capacitor and the load. due to the high speed switching on this pin, the switch node sho uld be routed away from sensitive nodes whenever possible. sns the sense (sns) pin is connected to the output of the device to provide feedback to the control circuitry. the sns connection should be placed close to the output capacitor. refer to pcb layout recommendations (mlf package) for more details. agnd the analog ground (agnd) is the ground path for the biasing and control circuitry. the current loop for the signal ground should be separate from the power ground (pgnd) loop. refer to pcb layout recommendations (ml f package) for more details. pgnd the power ground (pgnd) pin is the ground path for the high current in pwm mode. the current loop for the power ground should be as small as possible and separate from the analog ground (agnd) loop as applicable. refer to pcb layout recommendations (mlf package) for more details. pgood the power good (pgood) pin is an open drain output which indicates logic high when the output voltage is typically above 90% of its steady state voltage. a pull - up resistor of more than 5k? should be connected from pg ood to vout. ss the soft - start (ss) pin is used to con trol the output voltage ramp up time. the approximate equation for the ramp time in seconds is 820 103 ln(10) c ss . for example, for a c ss = 120pf, t rise 230s. refer to the ?v out rise time vs. c ss ? graph in the typical characteristics section. the minimum recommended value for c ss is 120pf. vi2c power connection for i 2 c bus voltage. connect this pin to the voltage domain of the i 2 c bus supply. vsel selectable output voltage of either of two i2c voltage register s. a logic low selects b uck regis ter 1 and logic high selects buck register 2. if no i 2 c programming is used the output voltages will be as per the default voltage register values. do not leave floating. scl the i 2 c clock input pin provides a reference clock for clocking in the data signal. this is a fast - mode plus 1mhz input pin, and requires a 4.7k? pull - up resistor. sda the i 2 c data input/output pin allows for data to be written to an d read from the MIC23156. this is a fast - mode plus 1mhz i 2 c pin, and requires a 4.7k? pull - up resistor.
micrel, inc. MIC23156 april 22, 2013 13 r evision 1.0 application information the MIC23156 is a high - performance dc - to - dc step - down regulator o ffering a small solution size and s upporting up to 1.5a in a 2.8mm 2.5mm mlf and 1.81mm 1.71mm wlcsp package. using the hyperlight load switching scheme, the MIC23156 is able to maintain high efficiency and exceptional voltage accuracy throughout the entire l oad range while providing u ltra - fast load transient response. another beneficial feature is the ability to dynamically change the output voltage in steps of 10mv. the following sub sections provide additional device application information. input capacitor a 2.2f (or larger) ceramic capacitor should be placed as close as possible to the pvin and avin pin s with short trace for good noise performance . x5r or x7r type ceramic capacitors are recommended for better tolerance over temperature. the y5v and z5u type temperature rating ceram ic capacitors are not recommended due to their large reduction in capacitance over temperature and increased resistance at high frequencies. these reduce their ability to filter out high - frequency noise. the rated voltage of the input capacitor should be a t least 20% higher than the maximum operating input voltage over the operating temperature range . output capacitor output capacitor selection is also a trade - off between performance, size, and cost. increasing output capacitor will lead to an improved tran sient response, however, the size and cost also increase. the MIC23156 is designed for use with a 2.2f or greater ceramic output capacitor. a low equivalent series resistance (esr) ceramic output capacitor is recommended based upon performance, size and c ost. both the x7r or x5r temperature rating capacitors are recommended. refer to table 1 for additional information. inductor selection inductor selection is a balance between efficiency, stability, cost, size, and rated current . since the MIC23156 is compensated internally, the recommended inductance of l is limited from 0.47 h to 2.2h to ensure system stability . for faster transient response, a 0.47 h inductor will yield the best result. for lower output ripple, a 2.2h inductor is recommended. maximum current ratings of the inductor are generally given in two methods; permissible dc current, and saturation current. permissible dc current can be rated either for a 40c temperature rise or a 10% to 3 0% loss in inductance. ensure the inductor selected can handle the maximum op erating current. when saturation current is specified, make sure that there is enough margin so that the peak current does not cause the inductor to saturate. peak current can be calculated as noted in equation 1 : ? ? ? ? ? ? ? ? ? ? ? ? ? + = l f 2 v / v 1 v i i in out out out peak eq. 1 as shown by equation 1 , the peak inductor current is inversely proportional to the switching frequency and the inductance. the lower the switching frequency or the inductance, the higher the peak current. as input voltage increases, the peak current also i ncreases. the size of the inductor depends up on the requirements of the application. refer to the typical application and bill of materials for details. dc resistance (dcr) is also important. while dcr is inversely proportional to size, dcr can represent a significant efficie ncy loss. refer to efficiency considerations . the transition between continuous - conduction m ode (ccm) to hyperlight load mode is determined by the inductor ripple curre nt and the load current. figure 2 shows the signals for high - side switch drive (hsd) for t on control, the inductor current and the low side switch drive (lsd) for t off control. figure 2 . hsd signals for t on control, inductor cu rrent, and lsd for t off control
micrel, inc. MIC23156 april 22, 2013 14 r evision 1.0 in hll mode, the inductor is charged with a fixed ton pulse on the high - side switch (hsd). after this, the lds is switched on and current falls at a rate v out /l. the controller remains in hll mode while the inductor falling current is detected to cross approximately 200ma. when the lsd (or t off ) time reaches its minimum and the inductor falling current is no longer able to reach this 200ma threshold, the part is in ccm mode and switching at a virtually constant freque ncy. table 1 optimizes the inductor to output capacitor combination for maintaining a minimum phase margin of 45 . table 1 . m aximum c out vs. inductor inductor minimum c out recommended c out maximum c out 0.47h 2.2f 4.7f 25f 1.0h 2.2f 2.2f 15f 2.2h 2.2f 2.2f 6.8f duty cycle the typical maximum duty cycle of the MIC23156 is 80%. thermal shutdown when the internal die temperature of MIC23156 reaches 160 c, the internal driver is disabled until the die temperature falls below 140 c. efficiency considerations efficiency is defined as the amount of useful output power, divided by the amount of power supplied, as shown in equation 2: 100 i v i v % efficiency in in out out ? ? ? ? ? ? ? ? = eq. 2 there are two types of losses in switching converters: dc losses and switching losses. dc losses are simply the power dissipation of i 2 r. p ower is dissipated in the high - side switch during the on cycle. power loss is equal to the high side mosfet r dson multiplied by the switch current squared. during the off cycle, the low side n - channel mosfet co nducts, also dissipating power. device operating current also reduces efficiency. the product of the quiescent (oper ating) current and the supply voltage represents another dc loss. the current required driving the gates on and off at a constant 3mhz frequency and the switching transitions make up the switching losses. figure 3 . efficiency un der load figure 3 shows an efficiency curve. from 10ma load to 1.5a, efficiency losses are dominated by quiescent current losses, gate drive and transition losses. by using the hyperlight load mode, the MIC23156 is able to maintain high efficiency at low output currents. over 200ma, efficiency loss is dominated by mosfet r dson and inductor losses. higher input supply voltages will increase the gate - to - source threshold on the internal mosfets, thereby reducing the internal r dson . this improves efficiency by reducing dc losses in the device. all but the inductor losses are inherent to the device. in which case, inductor selection becomes increasingly critical in efficiency calculations. as the inductors are reduced in size, the dc resistance (dcr) can become quite significant. the dcr losses can be calculated as in equation 3: p dcr = i out 2 x dcr eq. 3 from that, the loss in efficiency due to inductor resistance can be calculated as in equation 4: efficiency loss = 100 p i v i v 1 dcr out out out out ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? eq. 4 efficiency loss due to dcr is minimal at light loads and gains significance as the load is increased. inductor selection becomes a tradeoff between efficiency and size in this case. 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10000 efficiency (%) output current (ma) efficiency (v out = 1.8v) vs. output current vin = 3.6v vin = 5v vin = 2.7v vin = 4.2v c out = 2.2f l = 1h
micrel, inc. MIC23156 april 22, 2013 15 r evision 1.0 hyperlight load mode the MIC23156 uses a minimum on and off time proprietary control loop (patented by micrel). when the output voltage falls below the regulation threshold, the error comparator begins a switching cycle that turns the pmos on and keeps it on for the duration o f the minimum - on- time. this increases the output voltage. if the output voltage is over the regulation threshold, then the error comparator turns the pmos off for a minimum - off - time until the output drops below the threshold. the nmos acts as an ideal rect ifier that conducts when the pmos is off. using an nmos switch instead of a diode allows for lower voltage drop across the switching device when it is on. the synchronous switching combination between the pmos and the nmos allows the control loop to work i n discontinuous mode for light load operations. in discontinuous mode, the MIC23156 works in hyperlight load to regulate the output. as the output current increases, the o ff time decreases, thus provid ing more energy to the output. this switching scheme imp roves the efficiency of MIC23156 during light load currents by only switching when it is needed. as the load current increases, the MIC23156 goes into continuous conduction mode (ccm) and switches at a frequency centered at 3mhz. the equation to calculate the load when the MIC23156 goes into continuous conduction mode may be approximated by equation 5 : ( ) ? ? ? ? ? ? ? > f l 2 d v v i out in load eq. 5 as shown in equation 5, the load at which the MIC23156 transitions from hyperlight load mode to pwm mode is a function of the input voltage (v in ), output voltage (v out ), duty cycle (d), inductance (l) and frequency (f). as shown in figure 4, as the output current increases, the switching frequency also increases until the MIC23156 goes from hyperlight load mode to pwm mode at ap proximately 200ma. the MIC23156 will switch at a relatively constant frequency around 3mhz once the output current is over 200ma. figure 4 . sw frequency vs. output current output voltage setting the MIC23156 features dynamic vo ltage scaling and setting hardware that allow the output voltage of the buck regulator to be changed on the fly in increments of 10mv. the output voltage is set according to one of two registers that behave identically; buck_out1 when vsel = 0 and buck_out 2 when vsel = 1. if the buck_out value is changed while the vsel is selected and regulator is enabled, then the output voltage will immediately change to the new value using dynamic voltage scaling (dvs). equation 6 describes the relationship between the r egister value and the output voltage: v out = 0.7 + (0.01 reg buck_out ) eq. 6 note that the maximum output voltage is 2.4v corresponding to a register setting of 170 (0b10101010, 0xaa). a n example of this calculation is demonstrated in the calculating dac voltage code sub - section. i 2 c interface figure 5 shows the communications required for write and read operations via the i 2 c interface. the black lines show master communications and the red lines show the slave communications. during a write operation , the master must drive sda and s cl for all stages except the acknowledgement (a) shown in red, which are provided by the slave (MIC23156). t he read operation begins first with a data - less write to select the regist er address from which to read. a restart sequence is issued followed by a read command and a data read. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 100 1000 10000 switching frequency (mhz) output current (ma) switching frequency vs. output current v out = 1.8v c out = 2.2f 2.2h 1.0h
micrel, inc. MIC23156 april 22, 2013 16 r evision 1.0 the MIC23156 responds to a slave address of hex 0xb6 and 0xb7 for write and read operations respectively, or binary 1011011x (where x is the read/write bit, 0 = write, 1 = read). the register address is eight bits wide and carries the address of the MIC23156 register to be operated upon. only the lower three bits are used. figure 5 . required communications for read/write operations via i 2 c interface i 2 c register summary there are three i 2 c read/write registers of 8 - bit length. all registers are reset to a zero state whenever en 0.5v and set (reset) to their default values on the transition of en 1.5v. all registers are accessible by i 2 c. table 2 . register bit fie ld map reg. d7 d6 d5 d4 1 tsd uvlo pgood 2 buck_out1 3 buck_out2 reg. d3 d2 d1 d0 1 ssl buck_en 2 buck_out1 3 buck_out2 en able/status register (001b/01h) enable/status register is written to enable the output regulator (buck_en) and soft start extension mode (ssl). it is read to interrogate the status o f thermal shutdown (tsd), under voltage lockout (uvlo), and power good (pgood) status of the regulator. see table 3 for additional information. buck register 1 (010b/02h) and buck register 2 (011b/03h) these registers are written to set the output voltage to any one of 170 levels in 10mv steps. values above decimal 170 are equivalent to setting the register to 170. the two registers correspond to one of two states, which is selectable by the vsel input pin, which allow the regulator to be quickly switched b etween two voltage levels (e.g. enabled and standby). when vsel = 0, the output voltage is controlled by buck_out1 (reg2). when vsel = 1, then the output voltage is controlled by buck_out2 (reg3). see table 4 and table 5 for additional information.
micrel, inc. MIC23156 april 22, 2013 17 r evision 1.0 table 3 . enable and status register (reg1) bit field description bits name r/w por description 7 reserved r 0 6 tsd r 0 thermal shutdown status bit. this register bit will be set by internal hardware if a thermal shutdown event is triggered by the die temperature exceeding shutdown temperature. 5 uvlo r 0 undervoltage lockout status bit. this register bit will be set by internal hardware when the under voltage lockout circuit is active, and cleared when v in exceeds the uvlo threshold. 4 pgood r 0 power good status bit. this register will be set when the buck regulator output voltage is > nominally 10% of the output voltage set points as specified by vsel, buck_out1 and buck_out2. this regulator has the same function as the pgood output pin. 3:2 reserved r/w 00 1 ssl r/w 0 long soft - start enable bit. if this bit is set, then the internal soft start resistor is increased and the soft start time will be extended. 0 buck_en r/w 1 buck regulator enable bit. setting this bit will enable and turn on the buck regulator output. clearing this bit will disable the buck regulator output. table 4 . buck_out1 (reg2) bit field description bits name r/w por description 7:0 buck_out1 r/w 0x1e buck output voltage 1 setting for vsel = 0. setting this register value will change the output regulation point for the buck regulator when vsel = 0. if the buck is enabled and vsel = 0, changing the value will immediately cause the output voltage to trans ition to the new set point. table 5 . buck_out2 (reg3) bit field description bits name r/w por description 7:0 buck_out2 r/w 0x0a buck output voltage 2 setting for vsel = 1. setting this register value will change the output regulation point for the buck regulator when vsel = 1. if the buck is enabled and vsel = 1, changing the value will immediately cause the output voltage to transition to the new set point . calculating dac voltage code if the desired outp ut voltage is 1 .8v, then using e quation 6: ( ) ( ) 01 . 0 7 . 0 8 . 1 reg reg 01 . 0 7 . 0 v out _ buck out _ buck out ? = + = reg buck_out = 110 in decimal, 6e in hex, or 0110 1110 in binary
micrel, inc. MIC23156 april 22, 2013 18 r evision 1.0 evaluation board schematic ? MIC23156 - 0y ml
micrel, inc. MIC23156 april 22, 2013 19 r evision 1.0 bill of materials item part name manufacturer description qty. c1, c5 06036d225kat2a avx (1) 2.2f, 6.3v, x5r, 0603 2 grm188r60j225ke19d murata (2) c1608x5r0j225kt tdk (3) c2 06036d106mat2a avx 10f, 6.3v, x5r, 0603 1 grm188r60j106me47d murata c1608x5r0j106m tdk c3 eca - 1ahg221 panasonic (4) aluminum cap acitor, 220f, 10v, 20%, radial 1 c4 06035a121jat2a avx 120pf, 50v, 0603 1 grm1885c1h121ja01d murata c1608c0g1h121jt tdk l1 cdrh4d28cldnp - 1r0p sumida (5) 1h, 3.0a, 14m?, l5.1mm w5.1mm h3.0mm 1 lqh44pn1r0nj0 murata 1h, 2.0a, 48m?, l4.0mm w4.0mm h1.1mm r1, r2 crcw06034k70fkea vishay/dale (6) 4.7k?, 1%, 1/10w, 0603 2 r3 crcw06031003fkea vishay/dale 100k?, 1%, 1/10w, 0603 1 r4 crcw06030000z0ea vishay/dale 0?, 1/10w, 0603 1 r5 crcw060310r0fkea vishay/dale 10?, 1%, 1/10w, 0603 1 u1 MIC23156 - 0yml micrel, inc. (7) 1.5a, 3mhz synchronous buck regulator with hyperlight load and i 2 c control for dynamic voltage scaling 1 notes: 1. avx: www.avx.com . 2. murata: www.murata.com . 3. tdk: www.tdk.com . 4. panasonic: www.industrial.panasonic.com . 5. sumida: www.sumida .com . 6. vishay: www.vishay.com . 7. micrel, inc.: www.micrel.com .
micrel, inc. MIC23156 april 22, 2013 20 r evision 1.0 pcb layout recommendations (mlf package) top layer bottom layer
micrel, inc. MIC23156 april 22, 2013 21 r evision 1.0 package information (1) and recommended landing pattern (mlf package) 17- pin 2.8mm 2.5mm mlf note: 1. package information is correct as of the publication date. for updates and the most current information, go to www.micrel.com .
micrel, inc. MIC23156 april 22, 2013 22 r evision 1.0 package information (1) and recommended landing pattern ( wlcsp package) 16- ball 1.81mm 1.71mm wlcsp micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474 - 1000 web http://www.micrel.com micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in th is data sheet. this information is not intend ed as a warranty and micrel does not assume responsibility for its use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, micrel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right . micrel products are not designed or authorized fo r use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant int o the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. a purchaser?s use or sale of micrel products for use in life support appliances, devices or systems is a purch aser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 20 13 micrel, incorporated.

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